Analog & RF IC Senior Layout Engineer

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Summary

The Ash Group is hiring an Analog & RF IC Senior Layout Engineer (24629) for our client, a global technology powerhouse supplying semiconductor and infrastructure software products for the world's leading networks. This is a fulltime position working in Irvine or San Diego, CA (Onsite). We are offering a salary up to 165K based on skill set.

Role Details

• Compensation: Up to $165K W2
• Benefits: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.
• Location: Irvine or San Diego, CA (Onsite)

What You’ll Be Doing

• Join an industry-leading team of innovators to build the next generation of high-tech hardware. As an Analog/RF Layout Engineer, you won’t just watch from the sidelines—you'll be in the trenches of custom IP block design, translating complex schematics into physical reality on the world’s most advanced process nodes.
• Bridge the Gap: Translate circuit schematics into DRC/LVS-clean layouts for critical IP blocks.
• Collaborate & Strategize: Partner with senior designers on floor planning, power/ground architecture, and precision device matching.
• Master the Tools: Leverage industry-standard EDA tools and cutting-edge technology nodes (FinFET and beyond).
• Impact the Roadmap: Participate in schedule assessments and top-level integration for projects that define our products' success.

What We’re Looking For

• A BS degree in Electrical Engineering (or a related field) with 8+ years of related experience, OR an MS degree in Electrical Engineering (or a related field) with 6+ years of related experience is required
• Extensive experience with the layout of high-speed custom analog and digital circuits (e.g., TX, RX, SerDes, and PLLs) is a must
• Deep familiarity with the Cadence Virtuoso tool suite for designing and verifying high-speed custom circuits, including the Virtuoso VXL layout suite and Mentor Calibre verification.
• Proven design and layout experience in advanced FinFET nodes is required.
• A wide-ranging track record demonstrating both a thorough understanding of layout fundamentals and the creativity needed to solve complex circuit layout challenges.